Application Notes

This application note examines the limitations of traditional switching charge definitions when applied to reduced surface field MOSFETs. It introduces a revised method that accurately reflects their capacitance-voltage behavior, validated through measured switching losses.

This application note provides practical schematic and PCB layout guidelines for half-bridge MOSFET circuits, addressing parasitic effects that impact switching behavior, EMI, efficiency, and device stress in high-frequency and parallel configurations.

This application note presents a practical approach to dead time optimization in hard switched half bridge power circuits. A measurement based tuning procedure is proposed based on body-diode conduction time.

This application note provides a practical method for designing an RCD snubber clamp for flyback converters. It derives equations for clamp voltage, leakage-current decay, and snubber power dissipation, then shows how to select the snubber resistor to balance MOSFET voltage stress and clamp loss.

This application note presents a practical method for designing RC snubbers for hard-switched MOSFET circuits. It uses measured ringing frequency and MOSFET output capacitance to estimate commutation-loop inductance and select snubber resistor and capacitor values, while addressing PCB layout, parasitic inductance, and parallel MOSFET configurations.

This user guide explains a statistical and worst-case analysis tool for evaluating dead-time variation in half-bridge MOSFET power circuits. The guide covers the underlying equations, parameter tolerances, Monte Carlo simulation methodology, and practical implementation in MATLAB® or GNU Octave to help designers optimize dead time margins while minimizing shoot-through risk, switching losses, and overshoot.